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Daily Archives: August 25, 2010

MSP430 basic coding/programing part 2 WDT+

2
Filed under electronics, Hardware, MSP430, programing

WDT is a very useful tool, as I explained before most of us will turn it off or use it as an interval timer. Timer_A has a similar timer function but more robust and more options.
So today we will be going over WDT and timer_A registers, how to setup them up, how you use them is up the you.

WDT is the watch dog timer, used for checking errors/faults, or software states, interval timer, interval interrupt, or what ever other uses you can think of.

So lets start with the basic register WDTCTL
This is the main register that will configure the WDT, bits 15-8 are the password register and 7-0 are for control. you need to set the password register before you can modify bits 7-0.
to do this WDTCTL = WDTPW; // WDTPW = 0x5A00 or 01011010 00000000
This will allow access to the 7-0 bits to configure the WDT. The rest of the registers are used to turn off, setup, change to interval mode, set interupts, change clock sources, and more.
This next set of registers is taken from the slau144e.pdf from the TI website, this book explains how it all works and what the settings mean.

WDTHOLD Bit 7 Watchdog timer+ hold. This bit stops the watchdog timer+. Setting
WDTHOLD = 1 when the WDT+ is not in use conserves power.

  • 0 Watchdog timer+ is not stopped
  • 1 Watchdog timer+ is stopped
  • WDTNMIES Bit 6 Watchdog timer+ NMI edge select. This bit selects the interrupt edge for the
    NMI interrupt when WDTNMI = 1. Modifying this bit can trigger an NMI. Modify
    this bit when WDTIE = 0 to avoid triggering an accidental NMI.

  • 0 NMI on rising edge
  • 1 NMI on falling edge
  • WDTNMI Bit 5 Watchdog timer+ NMI select. This bit selects the function for the RST/NMI pin.

  • 0 Reset function
  • 1 NMI function
  • WDTTMSEL Bit 4 Watchdog timer+ mode select

  • 0 Watchdog mode
  • 1 Interval timer mode
  • WDTCNTCL Bit 3 Watchdog timer+ counter clear. Setting WDTCNTCL = 1 clears the count
    value to 0000h. WDTCNTCL is automatically reset.

  • 0 No action
  • 1 WDTCNT = 0000h
  • WDTSSEL Bit 2 Watchdog timer+ clock source select

  • 0 SMCLK
  • 1 ACLK
  • WDTISx Bits 1-0
    Watchdog timer+ interval select. These bits select the watchdog timer+
    interval to set the WDTIFG flag and/or generate a PUC.

  • 00 Watchdog clock source /32768
  • 01 Watchdog clock source /8192
  • 10 Watchdog clock source /512
  • 11 Watchdog clock source /64
  • Read More »